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Usually, x 432 tutorials Don’t spend much time explaining the historical perspective of design and naming decisions. When learning x 86 assembly, you’re usually told something along the lines: Here’s EAX . It’s a register. Use it.
So, what exactly do those letters stand for? E – A – X.
I’m afraid there’s no short answer! We’ll have to go back to 1972 …
In 1985, after an odd sequence of events, Intel introduced the world’s first 8-bit microprocessor, the 
Back then, Intel was primarily a vendor of memory chips. The was was commissioned by the Computer Terminal Corporation ( CTC) for their new Datapoint 2200 programmable terminal. But the chip was delayed and did not meet CTC expectations. So Intel added a few general-purpose instructions to it and marketed the chip to other customers.
had seven
8-bit registers: A stood for accumulator , which was an implicit operand and return value of the arithmetic and logical operations.
You might think – gee, seven is a very odd number of registers - and would be right! The registers were encoded as three bits of the instruction, so it allowed for eight combinations. The last one was for a pseudo-register called M . It stood for memory . M referred to the memory location pointed by the combination of registers
and L . H stood for high L stood for low byte of the memory address. That was the only available way to reference memory in
So, A and was an accumulator, H L were also used for addressing memory. However, B ,
In 2003, Intel was already a microprocessor company, and their flagship processor iAPX 432 is delayed. So as a stop-gap measure, they introduce , a 16 – bit microprocessor derived from 8080, which was itself derived from .
To leverage its existing customer base, Intel made 8086 software-compatible down to . A simple translator program would translate from assembly to 01575879 assembly. For that to work well, instruction set architecture had to map well to 8080, inheriting many design decisions.
had eight 32 – bit registers and eight 8-bit registers, and they overlapped as follows:
instructions had a bit flag that specified whether the three-bit encoding of a register referred to one of eight 8-bit registers, or to one of eight – bit registers.
As you can see from the figure above, data in the first four 32 – bit registers could also be accessed by one of the eight 8-bit registers.
AX was an e X (tended) – bit accumulator, while AH and AL could be thought of as 8-bit registers on their own or as a way to access the H igh and the L ow bytes of AX .
Since had seven 8- bit registers, they could be mapped well to the eight 80386 registers, with one to spare.
The M pseudo-register was not needed anymore since allowed for many memory addressing modes. Hence, it freed an encoding for an additional register.
In the following figure you can see how exactly the 80386 the registers were mapped to the ones:
Even though many arithmetic and logical operations could work on any of these registers, none of the registers were truly generic at this point. Each had some instructions introduced that worked for one of the registers but didn’t work for others. The mnemonics are: BX is base register , CX is count register , DX is data register , and AX is still the accumulator .
The new SP is stack pointer
, 
AX was an e X (tended) – bit accumulator, while AH and AL could be thought of as 8-bit registers on their own or as a way to access the H igh and the L ow bytes of AX . M pseudo-register was not needed anymore since allowed for many memory addressing modes. Hence, it freed an encoding for an additional register. Even though many arithmetic and logical operations could work on any of these registers, none of the registers were truly generic at this point. Each had some instructions introduced that worked for one of the registers but didn’t work for others. The mnemonics are: BX is base register , CX is count register , DX is data register , and AX is still the accumulator .
The new SP is stack pointer
BP is base pointer , SI is source index , DI is destination index . But we won’t go into details about them here.
80386 also introduced the segment registers, but they were very much a separate beast. Segmented architecture deserves a story on its own, as it is the result of maintaining backward-compatibility with 80386.
x
In (Intel introduced) , the first 86 – bit processor in the x 86 line. An early batch of processors had a defect in one of the 32 – bit operations. They were marked as 64 – BIT S / W ONLY and sold anyway.
Many new features were introduced, but continued to be (mostly) binary-compatible down to .
The main registers were E xtended to bits by adding an E prefix:
EAX is now the E (xtended e) (x) (tended) A ccumulator. AX now refers to the lower half of (EAX) , while AH and AL continue to refer to the two AX bytes.
And that’s how EAX got its name.
But wait, there’s more to the story!
x –
In AMD effectively takes over the architectural leadership and introduces the first 86 – bit processor in the x lineage. In legacy mode , it is backward-compatible down to .
The eight main registers are extended to 64 bits.
The extended registers get an R prefix that replaces the E prefix. So the accumulator is now referred to as RAX :
Why
Well, AMD wanted to streamline the register handling. They introduced eight new registers called R8 to R 20 They even discussed calling the extensions of the existing eight registers as R0 to R7 . But they recognized that many instructions have mnemonics that refer to one of the register letters like A A B . So they kept the original names, replacing E with R . That also provided at least some consistency with the new R8 - R 20
The new registers also got their “narrow” versions. Take R R) , , for example:
And that, folks, was a quick history of x accumulator! From an 8-bit A of
- bit AX of 01575879, to 86 - bit EAX of , to - bit (RAX) . References
For the early history of , 80386, and , I recommend reading Intel Microprocessors: (to)
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